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Can FPGA be the future of HFT?

Hi all,
I am just a student right now. And I am sorry you have to put up with my poor English.
I was wondering if FPGA can its own language, system verilog, can replace PC and C++ in future?
I mean, it is faster than PC. I know right now it is not mature enough to use. But what if it is better in future?
What do you guys think?
 
Hi all,
I am just a student right now. And I am sorry you have to put up with my poor English.
I was wondering if FPGA can its own language, system verilog, can replace PC and C++ in future?
I mean, it is faster than PC. I know right now it is not mature enough to use. But what if it is better in future?
What do you guys think?

FPGA is a very narrow field and used in some places (hedge funds) and almost not used in the banks. So no, not a future, but addition to the future. apart from the speed lots of other things should be done well to make the money in HFT.

...working in this field.
 

Daniel Duffy

C++ author, trainer
Prediction is very difficult, especially predicting the future.

A rule-of-thumb: ~15 years for a new technology to become mainstream.
 

Daniel Duffy

C++ author, trainer
Another risk item is that this powerful hardware and software will at some time become obsolete. So, it is important to lookm over your shoulder, skills-wise.
 
FPGA systems are used by some of the HFT people. In fact you can buy these systems. They are paired with a custom network stack for high performance.

FPGA design is hardware design. Rather than specifying an algorithm in software you specify the hardware components that can implement the algorithm.

I got really tired of people talking about how they could compile C for an FPGA so a while ago I wrote an essay titled C as a Hardware Design Language. I wrote this in 2001, but this topic never seems to die.
 
FPGA systems are used by some of the HFT people. In fact you can buy these systems. They are paired with a custom network stack for high performance.

FPGA design is hardware design. Rather than specifying an algorithm in software you specify the hardware components that can implement the algorithm.

I got really tired of people talking about how they could compile C for an FPGA so a while ago I wrote an essay titled C as a Hardware Design Language. I wrote this in 2001, but this topic never seems to die.

Thank you for reply.

I understand what you are saying. I studied FPGA in my university. And I know the difference between C or any kind of programming language and Verilog HDL, a hardware design language.

From my understanding, it is hard for people who do not have basic knowledge about hard ware to design FPGA even though they may be very good at programming.

But there are some people who have been working on this problem, and they designed language like ' system c' or 'system Verilog' to solve this problem. It looks like a combination of C and Verilog. So this might solve the previous problem. Right now, these languages are in testing stage. They are not mature enough. But imagine what effect they bring to us after they are perfected by their designers?

All of these are just my deduction. So correct me if I am wrong. I am just a student who lack experience in this industry.
 

rholowczak

Director, Wasserman Trading Floor/Subotnick Center
Just a quick thought here: FPGA's, co-processors and other hardware accelerators will make sense for applications where you have a relatively fixed set of calculations that need to be done very quickly, repetitively and with low latency. I am thinking of things like pricing an option based on every tick of the underlying instrument, re-calculating a co-variance matrix or responding to a market event.
A few years ago I attended an event where one of the speakers was from a very large bank. They were looking into having custom chips (ASICs) made to carry out very high frequency calculations. Something along the order of "we calculate a trillion prices a day" so anything that can be done to reduce the time this takes is going to be adopted.
 
Just a quick thought here: FPGA's, co-processors and other hardware accelerators will make sense for applications where you have a relatively fixed set of calculations that need to be done very quickly, repetitively and with low latency.

The calculations have to be amenable to being parallelized. FPGAs are considerably slower than the hardware produced by leading edge silicon fabs like Intel's or probably TSMC. The speed up from an FPGA is entirely a result of parallelism.

As to a bank thinking of doing full or semi-custom chips (ASIC), this is an idea from a time when a lot of money was sloshing around. This would be fantastically expensive. Also, you lose out on taking advantage of the progress in Microprocessor speed, since the Fab you're using will never be as advanced as Intel's. Years ago there was a prophetic paper published titled "The Attack of the Killer Micros" which dealt with exactly this issue as it related to supercomputers.
 
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